1. Field of the Invention
This invention relates generally to timing systems for integrated circuits (IC's), and more specifically, to novel circuits for altering the clock speed used to send and receive data within the IC based on physical characteristics of the IC.
2. Discussion of the Prior Art
In current integrated circuit design technology, circuits are typically designed to meet the worst case operating condition and technology process conditions. However, it is the case that typical process and operating conditions are not worst case resulting in existing margins in most worst case paths. If the design can take advantage of the real world margin, then significant performance gain could result.
It would thus be highly desirable to provide an Integrated Circuit equipped with error correction circuitry for ensuring that data send and receive rates within the IC are maximized.
It would be further highly desirable to provide an Integrated Circuit equipped with error correction circuitry for ensuring that data send and receive rates within the IC are maximized in accordance with the physical characteristics of the IC.